I’m an independent computer designer, programmer, and researcher, lately splitting most of my time between contributing to the specification of the new RISC-V ISA and working on an undisclosed RISC-V project. My technical interests include computer architecture (hardware), computer languages, compilers, software support libraries, low-level system software, and computer arithmetic. I’m perhaps best known as the author of Berkeley SoftFloat and TestFloat for floating-point arithmetic. I continue to update my résumé sporadically, in case you’re curious.

Besides work, I still regularly play ultimate (frisbee), and I occasionally travel, mostly in Europe. I dabble in photography and graphic art, and I study history on the side.

Interests

	Pictures of Roman ruins in Italy. Over 150 photographs from my first trip to Europe, way back in 1997.
	Great films.

Technical Projects, Past and Present

	HardFloat, SoftFloat, TestFloat. HardFloat and SoftFloat are hardware and software implementations of the IEEE floating-point standard, respectively. TestFloat is a program for testing whether a floating-point implementation conforms to the IEEE standard.
	The Garp processor. Garp is a hypothetical general-purpose microprocessor that includes on-chip “reconfigurable hardware” as an added computing device. Garp was the topic of my dissertation, and a project of the BRASS Research Group in the late 1990s.
	Algorithmic exception handling. By algorithmic I mean the common kind of exception handling now supported by many programming languages. My Master’s work was in this area.

Documents

	Publications and other documents.
	Résumé.

Contact Information

“Upon us all a little rain must fall.”